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E-DDCä Sta=
ndard
860 Hillview
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: 408 957 9270
Milpitas, CA 95035&nbs=
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nbsp; Fax: 408 957 9277
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nbsp; URL: www.vesa.org =
VESA Enhanced Display Data Channel (EDDC) Standard
Vers=
ion 1.2
Dece=
mber 26,
2007
Purpose
The
purpose of this standard is to define a communications channel between an e=
lectronic
display (e.g. a CRT, LCD, etc display) and a host system. The channel may be
used to carry configuration information to enable ‘plug & play=
217;
and allow optimum use of the display. The channel may also carry display
control information.
Summary
Today’s
computing and consumer electronic environments demands that systems offer
user-friendly set-up. With the growing popularity of intuitive and simpler
software user interfaces, hardware manufacturers are responding with
plug-and-play systems and peripherals. However, for the user to receive full
benefit from these advances, standardization is necessary. VESA, as the
prominent standards organization for graphics subsystems, has developed a
communications channel between the host and the display. This communication
channel offers basic configuration information plus a standard way of
communicating advanced functionality.
Table of Content=
s
1.3 &nbs=
p; Significant
Changes in Current E-DDC Revision.
1.4 &nbs=
p; Reference
Documents
2.1.1 =
; Enhanced
Extended Display Identification Data: E-EDID..
2.1.2 =
; Enhanced
Extended Display Identification Data Extension Blocks.
2.1.3 =
; Display
Identification: DisplayID
2.2 &nbs=
p; Communication
Protocols
2.2.2 =
; Display
Data Channel (DDC)
2.2.3 =
; DDC
addresses (A0h / A1h and A4h / A5h)
2.2.4 =
; Enhanced
DDC (E-DDC)
2.2.5 =
; Segment
pointer (60h)
2.2.6 =
; Typical
Operation Sequences
2.2.=
7 DDC Command Interface (DDC/CI)=
2.3.3 =
; Enhanced
DDC Display
2.4 &nbs=
p; Host
System Types
3.1 &nbs=
p; Example
of Host Operation
4.1 &nbs=
p; Signal
Termination
5.1.1 =
; Basic
operation for E-DDC access of EDID:
5.1.2 =
; Basic
Operation for E-DDC Access of DisplayID:
6.1 &nbs=
p; Read
at the Current Address
6.2 &nbs=
p; DDC
Random Read Operation
6.3 &nbs=
p; DDC
Sequential Read Operation
6.4 &nbs=
p; E-DDC
Random Read Operation
6.5 &nbs=
p; E-DDC
Sequential Read Operation
7.1.2 =
; VGA
Connector Pinouts
7.2 &nbs=
p; Digital
Visual interface (DVI)
7.3 &nbs=
p; High
Bandwidth Digital Multimedia Interface (HDMI)
7.3.3 =
; HDMI
Connector Pin-outs
7.4.1 =
; Mechanical
– External DisplayPort
7.4.2 =
; DisplayPort
External Connector Pin-Out
9.1.1 =
; DDC
Host System Connected to an E-DDC Display.
9.1.2 =
; Enhanced
DDC Host Connected to a DDC Display.
10.3 New
Host Subsystem Designs
10.5.3 EDID
/ DisplayID Available with Display Powered Off
10.6 Co-existence
of E-DDC, DDC/CI and HDCP
11.&=
nbsp; Appendix
A: Answers to Commonly Asked Questions.
12.&=
nbsp; Appendix
B: Main Contribution History
Tables
Table
1‑1: Main Contributors to Version 1, Revision 2.
Table 1‑1: Reference Documents.
Table 2‑1: Summary of DDC Communication Modes
Table 5‑1: DDC and E-DDC
Device Addresses - EDID
Table 5‑2: DDC and E-DDC
Device Addresses - DisplayID
Table 7‑1: 15-pin D-type
Connector Pinouts
Table 7‑2: DVI Connector
Pin-out
Table 7‑3: HDMI-A & =
HDMI-B
Connector Pin-outs
Table 7‑4: DisplayPort
External Connector Pin-out
Table 10‑1: Segment poin=
ter
tests
Table 10‑3: EDID and/or
DisplayID Read with no Dis=
play
Power
Table 11‑1: Answers to Commonly Asked Questions about E-DDC and=
the
VGA Interface
Table 12‑1: Main Contrib=
utors
to E-DDC Version 1.0
Table 12‑2: Main Contrib=
utors
to E-DDC Version 1.1
Figures
Figure
2‑1: E-DDC Segment Pointer and Block Layout
Figure 6‑1: DDC Read at =
the
Current Address
Figure 6‑2: DDC random r=
ead
operation
Figure 6‑3: DDC Sequenti=
al
Read Operation
Figure 6‑4: E-DDC Random=
Read
Operation
Figure 6‑5: DDC Sequenti=
al
Read Operation
Figure 7‑2: DVI -I Socket Drawing.
Figure 7‑3: DVI-D Socket Drawing.
Figure 7‑5: HDMI-B Conne=
ctor=
Figure 7‑6: DisplayPort External Connector Receptacle
Figure 7‑7: DisplayPort External Connector Plug
Figure 8‑1: DisplayPort
Mapping of I2C to AUX Channel
Intellectual Property
Copyright © 1994 - 2007=
Video
Electronics Standards Association. All rights reserved.
While every precaution has been taken in the
preparation of this standard, the Video Electronics Standards Association a=
nd
its contributors assume no responsibility for errors or omissions, and make=
no
warranties, expressed or implied, of functionality or suitability for any
purpose.
Trademarks
All trademarks used within this document are the property of their
respective owners. VESA, E-EDID, DCM, DDC/CI, DI-EXT, =
DisplayID,
DisplayPort, MCCS, LS-EXT, PnP, and VBE/DDC are
registered trademarks of the Video Electronics Standards Association.
I2C is a trademark of Philips.
DVI is a trademark of the Digital Display Working Group.
HDMI and High Definition Multimedia Interface are trademarks of HDMI
Licensing, LLC.
HDCP (content protection standard) is from Digital Content Protecti=
on,
LLC. (www.digital-cp.com)
Patents
VESA draws
attention to the fact that it is claimed that compliance with this
specification may involve the use of a patent or other intellectual propert=
y.
VESA takes no position concerning the evidence, validity, and scope of this=
IPR.
Attention is drawn to the=
fact
that some of the elements of this VESA Specification
may be the subject of IPR other=
than
that identified above. VESA shall not be responsible for identifying any or=
all
such IPR, and has made no inqui=
ry
into the possible existence of any such IPR.
This spec=
ification
is being offered without any warranty whatsoever, and in particular, any wa=
rranty
of non-infringement is expressly disclaimed. Any implementation of this specification shall be made entire=
ly at
the implementer’s own ris=
k, and
neither VESA, nor any of its member=
s
or submitters, shall have any l=
iability
whatsoever to any implementer or
third party for any damages of any nature whatsoever directly or indirectly
arising from the implementation of this specification.
Support
Clarifications and application notes to support =
this
standard may be written. To o=
btain
the latest standard and any support documentation, contact VESA.
If you have a product that incorporates the Enha=
nced
Display Data Channel (E-DDC), you should ask the company that manufactured =
your
product for assistance. If yo=
u are
a manufacturer, VESA can assist you with any clarification you may
require. Submit all comments =
or
reported errors in writing to VESA using one of the following methods.
· =
Fax: &=
nbsp; 408
957 9277, direct this fax to Techni=
cal
· =
e-mail:
· =
Mail: &=
nbsp; Technical
&nbs=
p; &=
nbsp; Video
Electronics Standards Association
&nbs=
p; &=
nbsp;
Acknowledgements
This
document would not have been possible without the efforts of the VESA Displ=
ay Systems
Committee’s EDDC Task Group. In particular, the following indivi=
duals
and their companies contributed significant time and knowledge.
Table
1‑1: Main
Contributors to Version 1, Revision 2
|
Name |
Company |
|
|
Syed
Athar Hussain |
AMD |
|
|
Ashley
Saldanha |
EnTech
|
Task
Group Co-chair |
|
|
Ian
Miller Consultancy |
Document
Editor |
|
Chandra
Kondura |
Intel |
|
|
Matt
Sottek |
Intel |
|
|
Christian
Hofmann |
Kontron |
|
|
Jim
Webb |
Xponent |
Task
Group Vice-chair |
|
Alain
d’Hautecourt |
ViewSonic |
|
Revision History
Version =
1 &=
nbsp; &nbs=
p; September
2, 1999
Initial release of the stand=
ard. T=
he body
of the standard is derived from the VESA DDC Version 3 Standard. The major changes were the additio=
n of
the E-DDC protocols, removal of DDC1 protocol and clarification to the DDC
power requirements.
Version =
1,
Revision 1 &n=
bsp; March
24, 2004
A revision and update to the E-DDC standard to
encompass usage in consumer electronic products and video interfaces other =
than
VGA, with text clarified in several places.
Version =
1,
Revision 2 &n=
bsp; December
26, 2007
This revision updates the E-DDC standard, expand=
ing
its scope to encompass DisplayID and DisplayPort, and correcting and clarifying text in se=
veral
places.
1. OVERVIEW
1.1&=
nbsp;
Summary
The
Display Data Channel, DDC, is a subset of the I2C bus used to
provide bi-directional communications between a host device and an attached
display. In their basic form, the capabilities are limited to allowing the =
host
to request and read the EDID or the DisplayID f=
rom
the display – EDID and DisplayID are alte=
rnate
structures that each contains information about the capabilities of the
display.
In
the DDC standard, the host could only access a very limited address space w=
hich
constrained the size of the EDID or DisplayID. =
E-DDC
is fully backward compatible with DDC, but enables a significantly larger
address space to be used.
Notes:
1) The content and format of EDID are not defined i=
n this
standard; refer to the VESA Enhanced Extended Display Identification Data
Standard (E-EDID) and, where appropriate, the various VESA E-EDID extension
block standards and the CEA E-EDID extension defined in the CEA-861 standar=
d.
2) The content and format of D=
isplayID
are not defined in this standard. Refer to the VESA Display Identification =
(DisplayID) Standard.
The
scope of this document is to provide a detailed description of the operatio=
n of
E-DDC and its implementation.
However,
in addition to serving to request and transmit EDID and DisplayID,
the Display Data Channel also allows more advanced communication between the
display and host. This enables the host to control many aspects of the disp=
lay
capabilities and functions. For details of this communication mode see the =
VESA
Display Data Channel Command Interface Standard (DDC/CI) and for details of
commands see the VESA Monitor Command and Control Set (MCCS) standard.
Note: The “monitor” in the MCCS name shou=
ld not
be taken to mean that it only applies to computer displays; many MCCS comma=
nds
are applicable to any electronic display and some are exclusively for
television purposes.
DDC
communications has been widely implemented in a number of video interfaces
including VGA (15 pin high-density D-sub), DVI and HDMI.
This
document does not specify how the E-DDC interfaces communicate to the host =
CPU
and GPU address and I/O spaces.
Earlier
versions of the DDC and E-DDC standards introduced and supported a very sim=
ple
unidirectional, display to host, DDC1 mode – this mode is no longer s=
upported
by VESA.
The
VESA task group responsible for the development of this standard has spent
considerable time considering how best to manage the situation where there =
are
two (EDID and DisplayID) schemes that may be us=
ed to
convey capability information from the display to the host. The conclusion =
can
be summarized as follows:
- The data at I
- A second pair of=
I2C
slave addresses at A4h / A5h will be the secondary location for display
capability information.
Further
details are contained in Section 4.
1.2 Background
Early
personal computer monitor identification schemes were only capable of handl=
ing
a limited number of display types and parameters. Since these schemes carri=
ed
very little information about the capabilities of the display, they were of
limited value.
Earlier
versions of DDC and EDID defined a communication method and configuration d=
ata
appropriate for traditional CRT displays, but were limited in their support=
of
other display types and the amount of data that could be supported in the
display. Over time, VESA introduced enhanced versions of the DDC and EDID
standards, E-DDC and E-EDID respectively, with new capabilities.
As
new display technologies have been introduced to the market, support for
communication methods and configuration information suitable for these disp=
lays
has become a necessity. In re=
cent
years displays intended for digital and high definition television have als=
o adopted
DDC communication to transfer EDID from the display to the host.
- Modular
- The manufactur=
er
selects which blocks are appropriate for the product
- Flexible block s=
ize
- Many of the bl=
ock
definitions have variable lengths so that they can be used or either
simple or advanced display capabilities
- Efficient
- Block types an=
d size
are matched to the requirements of the individual display type.
- Overall size is
determined by the product requirements.
- No assumption ab=
out
display technology
- No implicit
assumptions about the display technology being used.
Note: For convenience and compatibility with EDID
structures, it is implied in this document that Displa=
yID
is organized in 128 byte blocks. However, DisplayID
actually has a variable length – see DisplayID
standard for details. The techniques described here will work, but may not =
be
the most efficient when applied to DisplayID.
1.3 Significant
Changes in Current E-DDC Revision
This
revision (1.2) updates the E-DDC standard with clarification and correction=
s together
with support for DisplayID. Changes may be summ=
arized
as:
· =
No support =
for
the DDC1 mode of operation
· =
Clarificati=
on of
the use of DDC on multiple interfaces – VGA, DVI, HDMI and DisplayPort
· =
Addition of=
a
compliance section – section 10
· =
Deletion of=
notes
regarding possible move from +5V to +3.3V for DDC power
· =